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This “Getting Started Tutorial” will instruct you on how to use the Software package entitled “HDL Designer” by the company MENTOR GRAPHICS. I didn’t do any fancy editing with this video, compared to all my other videos. This is just a straight forward, software instructional video.
This software is used for implementing Digital logic designs into CPLD & FPGA programmable Logic chips. Many of you may be familiar with similar types of software such as the popular ALTERA Quartus II. Quartus II is one of the main programs used by Colleges and Universities around the world to teach Digital electronics.
Programs like Quartus II & HDL Designer are all used for designing logic operations in VHDL programming language, but can also implement various other programming forms; including Digital schematic entry form. HDL Designer also has the “State Diagram” programming entry form. This is essentially a graphical means of implementing State Machines.
If your a student getting into VHDL programming, I highly recommend you look into Mentor Graphics software, as they are one of the leading competitors in the software business for Logic design and embedded systems programming. It is the software package of choice by most professionals in the working industry.
Below is a link to an overview of the HDL Designer Software off the Mentor Graphics Website:
Hopefully this instructional video will at least get you started. I’ll try and put out a few more videos showing you how to use the other programming entry forms like the State diagram entry form for implementing State Machines.
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For Additional Info on the Differences between VHDL Blocks and COMPONENT Blocks see the Link below: